Introduction
SMEI masters a number of world-leading process technologies and process modules, such as through-substrate-via, wafer bonding and deep reactive ion etching.
SMEI’s core business is MEMS process development and wafer manufacturing, holding the most advanced TSV insulation layer platform, which forms dielectric isolation area, achieves etching aspect ratio and vertical side-wall with DRIE, and shapes vias through the whole silicon wafer.
Process development
Develop product manufacturing processes
Process development business refers to the development of product manufacturing processes based on chip design solutions provided by customers. SMEI provides customized manufacturing processes.
Process development
Wafer manufacturing
Provide volume production of wafers
Wafer manufacturing business refers to the volume production of wafers for customers after the development of product manufacturing processes and the solidification of product design and production processes.
Wafer manufacturing
Category
MEMS Microphones
Pressure and dust resistant microphones.
BAW BAW Filters
Chip that solve signal interference problems.
MEMS Pressure Sensors
Chips that detect accurate pressure changes.
MEMS Biochips
Chips that measure biological components.
MEMS IMUs
Chips that measure the velocity of objects.
MEMS Lens
A kind of lens used for lithography machines.
MEMS Micromirrors
ore devices for laser beam manipulation
MEMS OCSes
Advanced chips that switch optical circuits.
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Service
Service
Highly customized
Integrate products directly and quickly by building standardized process modules and combining with optimized key and special processes.
Quality management
Our fab has passed the ISO9001, ISO14001, ISO45001 management system certification while IATF 16949 in the certification process.
IP protection
SMEI has set up professional network firewall and software, strict data security system, and passed the ISO/IEC 27001 certification.
Integration services
SMEI is building pilot lines in Shenzhen and Huairou, and is building advanced wafer-level packaging and testing capabilities.